Automotive Integrated Electronics Corporation (AIEC) has launched the AIEC9 microprocessor core, claiming it is the world’s fastest automotive grade microprocessor core with embedded flash memory.
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The chip is targeted at automotive applications, including powertrain, airbag and ABS systems.
The embedded flash microprocessor core can be combined with peripherals provided by AIEC, semiconductor suppliers, third-party suppliers, or automotive OEMs to create a customized microcontroller, or system on chip (SoC), to precisely meet a customer’s needs.
Used in an engine control unit, the new microprocessor core is claimed to provide new levels of throughput to accommodate advanced algorithms for increasing fuel economy while reducing emissions output.
Developed using hardware description language (HDL), the AIEC9 can be used in virtually any CMOS technology and, using 0.18um embedded flash technology, is currently capable of operating at 100 MHz across the automotive temperature range (-40.C to 125.C), making it what is claimed to be the fastest microprocessor core on the market today.
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By GlobalDataBy 2003, AIEC will extend the core’s capabilities to speeds of 200MHz while maintaining its automotive temperature capabilities.
The AIEC9 is powered by an ARM966E-S microprocessor core, which includes enhanced digital signal processing capabilities while floating point support is provided by the ARM VFP9-S vector floating point coprocessor, which is optimum for the automotive control market where large data ranges and small data values are predominant.
The coprocessor supports both single and double precision operations and includes vector operations for superscaler performance.
The initial AIEC9 platform chip contains 64 Kbytes of SRAM for data store and 1.25 Mbytes of instruction flash memory with a 128-bit microprocessor interface controlled by the AIEC memory expander.
The new AIEC9 chip is supported by the AIEC9DVB development board, which interfaces to the ARM Integrator series of development boards.
The AIEC9DVBcontains the 100 MHz AIEC9 platform chip, 256 digital I/O signals that are 5 volt capable, and 64 analogue inputs, also 5 volt capable, which are multiplexed into dual 500 Ksample/sec 12-bit ADCss. Bus interfaces and customer-specific logic are implemented in a Xilinx XC2V6000 Virtex2 FPGA, with a capacity of six million system gates of logic.
The AIEC9DVB allows customers to construct prototypes of the eventual SoC with a form factor that is suitable for in-vehicle mounting to enable the complete development cycle, from software development through calibration, to take place prior to receipt of the final silicon.
Engineering samples of the AIEC9 along with the AIEC9DVB(TM) development board will be available at the end of Q3, 2002.
